Bandgap voltage references are circuits that generate a temperature-stable voltage by combining a p-n junction voltage with a thermal voltage. In many circuits and devices (e.g., analog-to-digital converters, etc.), a precise voltage reference is required to operate the circuits and/or devices at a precise level. Persons of skill in the art will readily appreciate that temperature affects a threshold voltage at which a transistor operates. Generally, a bandgap reference is used to generate such a reference voltage that is temperature independent. To form a bandgap reference, a complementary-to-absolute-temperature (CTAT) voltage reference is generated that decreases with increasing temperature (i.e., the CTAT voltage has a negative temperature coefficient). The bandgap reference also forms a proportional-to-absolute-temperature (PTAT) voltage that increases with increasing temperature (i.e., the PTAT voltage has a positive temperature coefficient). When the PTAT and CTAT voltages are combined properly, their respective temperature coefficients cancel each other out, thereby resulting in a temperature stable voltage. In other examples, a PTAT voltage is also generated for other purposes (e.g., to provide a voltage that varies and represents temperature, etc.).
FIG. 1 illustrates a conventional fully isolated NPN-based bandgap reference circuit 100. Generally, in a fully isolated circuit, the only nodes that are coupled with the substrate are solid nodes (e.g., ground, voltage supply, etc.), thereby preventing collecting charge carriers from being injected into the example circuit 100 by other circuits. To isolate the circuit 100, the fabrication process provides an NPN transistor having a collector that is an N-type well. The NPN transistor also includes the base and emitter in the N-type well. In FIG. 1, the circuit 100 includes a voltage supply 101, a transistor 102, ground 103, and a transistor 104 having a larger current density than the transistor 102, thereby requiring a larger base-emitter voltage than the transistor 102 before the second transistor 104 will turn on. Transistors 102 and 104 are part of the constant current generator 110, and transistors 102 and 104 are isolated by coupling their respective collectors directly to the voltage supply 101. A resistor 109 is placed in series with the transistor 102 to measure the difference between the base-emitter voltages of the transistors 102 and 104. A resistor 106 is placed in parallel with the transistor 102 and a resistor 109 having a substantially equal resistance to resistor 106. Resistors 109 and 106 are coupled together at node 110 and the emitter of the transistor 104 is coupled to the resistor 108 at node 115.
Nodes 110 and 115 are also the inputs of a control circuit 120, which mirrors the voltages and currents between the nodes 110 and 115. In other words, the voltages at nodes 110 and 115 are substantially equal and the current flowing from nodes 110 and 115 into the control circuit 120 are also substantially equal. NMOS transistors 126 and 128 are matched, meaning that the transistors 126 and 128 are configured to have substantially identical device parameters (e.g., gate width-to-length ratios, etc.). Similarly, the PMOS transistors 122 and 124 are also matched. The transistor 104 sets the voltage at node 115 to the base-emitter voltage drop below the voltage supply 101. Therefore, the current flowing through the resistor 108 is the base-emitter junction voltage of the transistor 104 divided by the resistance of the resistor 108. As temperature increases, the base-emitter voltage decreases, thereby causing the current through resistor 108 to be the CTAT current ICTAT. The voltage at the node 110 is the voltage of node 115, thereby causing the CTAT current ICTAT to also flow into node 110 via the resistor 106.
In general, the currents flowing into the drains of the PMOS transistors 122 and 124 are substantially equal and the voltage at the source of the PMOS transistors 122 and 124 are also substantially equal. Persons of ordinary skill in the art will readily appreciate that the drain-source current of an NMOS transistor or a PMOS transistor in saturation is described by equation (1).
                              I          DS                =                              μ            n                    ⁢                      C            OX                    ⁢                      W            L                    ⁢                      (                          1              +                              λ                ⁢                                                                  ⁢                                  V                  DS                                                      )                    ⁢                      (                                          V                GS                            -                              V                th                                      )                                              (        1        )            where μn is the average carrier mobility, COX is the gate oxide capacitance per unit area, W is the gate width, L is the gate length, λ is the channel-length modulation parameter, VDS is the drain-source voltage, VGS is the gate-source voltage, and Vth is the threshold voltage of the transistor. As described above, the gates of the NMOS transistors 126 and 128 are coupled together and the sources of the NMOS transistors 126 and 128 are both coupled to ground, thereby forcing the NMOS transistors 126 and 128 to have substantially equal gate-source voltages. Thus, by matching the NMOS transistors 126 and 128, their drain-source currents will also be substantially equal.
By coupling the drain and the gate of the NMOS transistor 126, the NMOS transistor 126 sets its gate-source voltage to allow the drain-source current to flow through the NMOS transistor 126. As described above, the same gate-source voltage is applied to the gate of the NMOS transistor 128, thereby forcing the drain-source current of the NMOS transistor 128 to be equal or substantially equal to the drain-source current of the NMOS transistor 126. Persons having ordinary skill in the art will readily appreciate that NMOS transistors 126 and 128 form a current mirror whereby NMOS transistor 128 mirrors (i.e., substantially copies) the reference current of the NMOS transistor 126. Moreover, the additional current mirrors may be implemented by any active device (e.g., PMOS transistors, NPN bipolar transistors, etc.) without affecting the current flowing through the NMOS transistor 126.
As described above, the drain-source currents of the NMOS transistors 126 and 128 are configured to be equal or substantially equal. Due to NMOS transistors 126 and 128, the drain-source currents from the PMOS transistors 122 and 124 must also be equal or substantially equal. In the example of FIG. 4A, the PMOS transistors 122 and 124 are matched, thereby forcing the gate-source voltages of the PMOS transistors 122 and 124 to be equal or substantially equal. Thus, the controller 120 forces the voltages at the nodes 110 and 115 to be substantially equal and also forces the currents flowing from nodes 110 and 115 to be substantially equal.
In the constant current generator 110, the NPN transistor 104 is configured to operate as a diode and reduces the voltage at the node 115 based on the base-emitter junction voltage (i.e., VBE1) of the NPN transistor 104. In other words, the voltage applied to both nodes 110 and 115 is forced by the NPN transistor 104, and the voltages are described by equation (2):V110,V115=VSS−VBE104  (2)where V110 and V115 are the voltages at nodes 110 and 115, respectively, VBE104 is the base-emitter reference voltage drop across the base-emitter junction of the NPN transistor 104, and VSS is the voltage of the voltage source 101. Because the voltage at nodes 115 and 110 are forced to be equal, the current flowing through the resistors 106 and 108 are also known by equations (3) and (4):
                              I                      R            ⁢                                                  ⁢            106                          =                              V                          BE              ⁢              104                                            R            106                                              (        3        )                                          I                      R            ⁢                                                  ⁢            108                          =                              V                          BE              ⁢                                                          ⁢              104                                            R            108                                              (        4        )            where VBE404 is the base-emitter voltage across the NPN transistor 104 and R104 and R108 are the resistance value of resistors the 106 and 108, respectively.
The currents flowing from the nodes 110 and 115 to the control circuit 120 are substantially equal. Additionally, the currents from resistors 106 and 108 are also substantially equal, thereby causing the current flowing across the NPN transistors 102 and 104 to be substantially equal. In FIG. 1, the current flowing through the NPN transistor 102 determines the current flowing across the NPN transistor 104. To control the current across the NPN transistors 102 and 104, the NPN transistor 102 is selected to have a smaller current density than the NPN transistor 104 so that the base-emitter junction voltage is smaller, thereby configuring the NPN transistor 102 as a diode with a smaller base-emitter voltage (i.e., VBE). A voltage loop equation for the NPN transistors 102 and 104 is shown in equation (5):VBE104+VGS124−VGS122−I102R109−VBE102=0  (5)where VBE104 is the base-emitter voltage of the NPN transistor 404, VGS124 and VGS122 are the respective gate-source voltage of the PMOS transistors 122 and 124, I102 is the current flowing across the NPN transistor 102, R109 is the resistance of resistor 109 and VBE102 is the base-emitter voltage of the NPN transistor 102. Solving for current, the current that flows across the NPN transistors 102 and 104 is described in equation (6):
                              I          102                ,                              I            104                    =                                                                      V                                      BE                    ⁢                                                                                  ⁢                    104                                                  -                                  V                                      BE                    ⁢                                                                                  ⁢                    102                                                                              R                109                                      =                                                            Δ                  ⁢                                                                          ⁢                                      V                    BE                                                                    R                  409                                            =                              I                PTAT                                                                        (        6        )            where ΔVBE is the difference in the base-emitters voltages between the NPN transistors 102 and 104 (i.e., ΔVBE=VBE104−VBE102) and R109 is the resistance of resistor 109. Additionally, the resistances of the resistors are substantially constant over temperature.
In the constant current generator 110, the thermal voltages (i.e., VT=k*T/q, where k is Boltzmann's constant, T is temperature, and q is the charge of an electron) of the NPN transistors 102 and 104 increase as temperature increases. As a result, the thermal voltage causes the emitter currents of the NPN transistors 102 and 104 to decrease. The emitter current flowing via the NPN transistors is described by equation (7):
                              I          E                =                              J            S                    ⁢                      A            (                                          ⅇ                                                      V                    BE                                                        V                    T                                                              -              1                        )                                              (        7        )            where JS is the current density, A is the emitter size, VBE is the base emitter junction, and VT is the thermal voltage. Due to the smaller current density of the NPN transistor 102, the emitter current (i.e., VBE102) increases with temperature at a greater rate than the emitter current (i.e., VBE104) of the NPN transistor 104, thereby causing the current flowing through resistor 109 to increase. In other words, the current flowing through resistor 109 increases as temperature increases (i.e., the current has a positive temperature coefficient). Therefore, the current flowing via resistor 109 is proportional-to-absolute-temperature (i.e., the PTAT current IPTAT). Given the ratio between the emitter sizes of transistors 102 and 104, the PTAT voltage VPTAT is found per equation (8):VPTAT=ΔVBE=VT ln(N)  (8)where N is the ratio between the emitter sizes of transistors 102 and 104, and VT is the thermal voltage.
In contrast, the base-emitter junction voltage of transistor 104 decreases as temperature rises, which thereby increases the voltage at nodes 110 and 115. Thus, the current flowing into the nodes 110 and 115 via resistors 106 and 108, respectively, decreases as temperature increases. That is, the current flowing into nodes 110 and 115 via resistors 106 and 108, respectively, is complementary-to-absolute-temperature (i.e., the current has a negative temperature coefficient). The CTAT current ICTAT and the PTAT current IPTAT are described by:
                              I          PTAT                =                              Δ            ⁢                                                  ⁢                          V              BE                                            R            109                                              (        9        )                                          I          CTAT                =                              V                          BE              ⁢                                                          ⁢              104                                            R            106                                              (        10        )            where ΔVBE is the difference in the base-emitter voltages between the NPN transistors 102 and 104 (i.e., ΔVBE=VBE104−VBE102), R109 is the resistance of resistor 109, and R106 is the resistance value of resistor 106. The current flowing out of the nodes 110 and 115 is the sum of the CTAT current ICTAT and the PTAT current IPTAT. In some examples, the negative temperature coefficient of the CTAT current and the positive temperature coefficient of the PTAT current cancel each other out (e.g., via a ratio between resistors 406 and 409), thereby forming a constant current (ICONST) that is substantially constant over a change temperature.
In other words, because the transistors 102 and 104 have different current densities, their respective base-emitter junction voltages differ and the current flowing through the resistor 109 will be the based on the difference in the base-emitter junction voltages of the transistors 102 and 104 and the resistance of the resistor 109. As temperature increases, the increasing difference in the base-emitter voltages of transistors 102 and 104 cause the current flowing through the resistor 109 to increase, thereby causing the voltage across the resistor 109 to increase as temperature increases. Thus, the current flowing through resistor 109 forms the PTAT current IPTAT. The sum of the PTAT current IPTAT and the CTAT current ICTAT is the constant current ICONST. In FIG. 1, the CTAT current ICTAT and PTAT current IPTAT are generated in a single voltage loop.
However, to sense the PTAT voltage VPTAT, an operational amplifier 130 is coupled to the node 115. The operational amplifier 130 forces the voltage at an emitter of a transistor 140 to be the difference between the base-emitter voltage of the transistor 140 and the voltage source (i.e., VSS−VBE). In FIG. 1, the transistor 140 may have the same current density as the transistor 102. Because the base and collector of the transistor 140 are coupled to the voltage source 101 and the voltage across the base-emitter junction is forced by the operational amplifier 130, the transistor 140 sources the PTAT current IPTAT. To generate the PTAT voltage VPTAT, a current mirrors 150 and 151 may be implemented to mirror the PTAT current IPTAT, thereby copying the PTAT current IPTAT and forming PTAT voltage VPTAT drop across the resistor 160.